Access to vectors in multi-module memories

The poor bandwidth obtained from memory when conflicts arise in the modules or in the interconnection network degrades the performance of computers. Address transformation schemes, such as interleaving, skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this paper, we summarize a mechanism to request the elements in an out-of-order way which allows to achieve conflict-free access for a larger number of strides. We study the cases of a single vector processor and of a vector multiprocessor system. For this latter case, we propose a synchronous mode of accessing memory that can be applied in SIMD machines or in MIMD systems with decoupled access and execution.Peer ReviewedPostprint (published version

Conflict-free strides for vectors in matched memories

Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access to one family of strides in vector processors with matched memories. The paper extends these schemes to achieve this conflict-free access for several families. The basic idea is to perform an out-of-order access to vectors of fixed length, equal to that of the vector registers of the processor. The hardware required is similar to that for the access in order.Peer ReviewedPostprint (author's final draft

"Piénsatelo bien": reflexiones sobre el papel de la educación para un consumo más responsable

[p.4] Es busquen persones conscients[p.10] Aprenem per a un altre món[p.15] Educar-nos en el quotidià[p.19] La compra pública sostenible[p.31] Educar en el consum[p.39] Contextualitzant l'aprenentatge[p.50] Entrevista amb la Montse Peiron, directora de “Opcions”[p.35] Tejiendo la sostenibilidadPeer Reviewe

Access to vectors in multi-module memories

The poor bandwidth obtained from memory when conflicts arise in the modules or in the interconnection network degrades the performance of computers. Address transformation schemes, such as interleaving, skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this paper, we summarize a mechanism to request the elements in an out-of-order way which allows to achieve conflict-free access for a larger number of strides. We study the cases of a single vector processor and of a vector multiprocessor system. For this latter case, we propose a synchronous mode of accessing memory that can be applied in SIMD machines or in MIMD systems with decoupled access and execution.Peer Reviewe

Synchronized access to streams in multiprocessors

The synchronized and simultaneous access to several vectors that form a single stream occurs in SIMD vector multiprocessors as well as in MIMD superscalar multiprocessors with decoupled access. In this paper we propose a block-interleaved storage scheme and an out-oforder access mechanism that allows conflict-free access to streams with an arbitrary initial address and constant stride between elements. A maximal number of conflict-free families including the most commonly used strides can be obtained. We consider the use of a crossbar interconnection network, although the method applies also for the case of a multistage interconnection network.Peer Reviewe

Conflict-free access for streams in multimodule memories

Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this paper, we extend these schemes to achieve this conflict-free access for a larger number of strides. The basic idea is to perform an out-of-order access to a stream of fixed length. This stream is then stored in a local memory and used in subsequent instructions. This mode of operation is suitable for vector processors and for processors with decoupled access. The scheme and mode of operation proposed produce the largest possible number of conflict-free strides. Memory systems with any ratio between the number of memory modules and memory latency are considered. The hardware for address calculations and access control is described and shown to be of similar complexity as that required for access in orderPeer ReviewedPostprint (published version

Conflict-free access for streams in multimodule memories

Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this paper, we extend these schemes to achieve this conflict-free access for a larger number of strides. The basic idea is to perform an out-of-order access to a stream of fixed length. This stream is then stored in a local memory and used in subsequent instructions. This mode of operation is suitable for vector processors and for processors with decoupled access. The scheme and mode of operation proposed produce the largest possible number of conflict-free strides. Memory systems with any ratio between the number of memory modules and memory latency are considered. The hardware for address calculations and access control is described and shown to be of similar complexity as that required for access in orderPeer Reviewe

Fundamentos de computadores, setiembre 2011

Aquesta assignatura és el punt d'entrada al coneixement de l'arquitectura dels computadors. És per això que no es pressuposa cap coneixement previ d'aquesta disciplina ni de cap altra assignatura d'aquests estudis.Esta asignatura es el punto de entrada al conocimiento de la arquitectura de los computadores. Es por eso que no se presupone ningún conocimiento previo de esta disciplina ni de ninguna otra asignatura de estos estudios.This course is the entry point to knowledge of computer architecture

Fundamentos de computadores, setiembre 2011

Aquesta assignatura és el punt d'entrada al coneixement de l'arquitectura dels computadors. És per això que no es pressuposa cap coneixement previ d'aquesta disciplina ni de cap altra assignatura d'aquests estudis.Esta asignatura es el punto de entrada al conocimiento de la arquitectura de los computadores. Es por eso que no se presupone ningún conocimiento previo de esta disciplina ni de ninguna otra asignatura de estos estudios.This course is the entry point to knowledge of computer architecture

Fonaments de computadors, setembre 2011

Aquesta assignatura és el punt d'entrada al coneixement de l'arquitectura dels computadors. És per això que no es pressuposa cap coneixement previ d'aquesta disciplina ni de cap altra assignatura d'aquests estudis.Esta asignatura es el punto de entrada al conocimiento de la arquitectura de los computadores. Es por eso que no se presupone ningún conocimiento previo de esta disciplina ni de ninguna otra asignatura de estos estudios.This course is the entry point to knowledge of computer architecture